1. Field of the Invention
The present invention relates to a semiconductor integrated circuit apparatus. More particularly, the present invention relates to an ESD (Electrostatic Discharge) protecting circuit apparatus incorporated in order to protect an internal circuit from a surge input of an electrostatic discharge applied to an external terminal. The electrostatic discharge protecting circuit apparatus is applied to a CMOS LSI of low power supply voltage type using a silicon controlled rectifier (SCR) element as a voltage clamping element for ESD protection, for example.
2. Description of the Related Art
For example, an electrostatic discharge protecting circuit connected between an external terminal and an internal circuit in order to protect an input circuit or an output circuit of a CMOS LSI uses a diode, a transistor, or a SCR as a protecting element.
Such an electrostatic discharge protecting circuit using an SCR is high in trigger voltage of the SCR in general. Thus, in the case where the electrostatic discharge protecting circuit is applied to a fine CMOS LSI operable in a low power supply voltage, it is necessary to reduce the trigger voltage in order to protect a MOS transistor with a low gate breakdown voltage.
From such a background, an example in which an electrostatic discharge protecting circuit using an SCR has been applied to a CMOS LSI of low power supply voltage type is disclosed in “A Gate-Coupled PTLSCR/NTLSCR ESD Protection Circuit for Deep-Submicron Low-Voltage CMOS IC's 1″, IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 32, NO. 1, January 1997”. The electrostatic discharge protecting circuit applies triggering by utilizing a transient potential change when a surge input to an input pad to which the SCR is connected. However, a satisfactory protecting characteristic cannot be obtained.
In order to solve this problem, the applicants have proposed a technique of applying an electrostatic discharge protecting circuit to an LSI with a low power supply voltage disclosed in Japanese Patent Application KOKAI Publication No. 2003-318265, thereby achieving a preferable protecting characteristic by applying a low voltage trigger and enhancing reliability.
In the proposed circuit, when an input of a surge voltage becomes a problem, a normal power supply potential VDD is not applied yet, and a gate of a PMOS transistor for trigger input is set to the ground potential GND.
Therefore, in this state, when a surge voltage with a positive polarity is inputted to an input pad of an input circuit, and if a bias voltage in the forward direction that is greater than an absolute value of the gate threshold voltage Vthp of the PMOS transistor is applied between the gate and source of the PMOS transistor, the gate of the PMOS transistor is turned ON.
In this manner, a trigger is applied to the SCR, the SCR is turned ON, a surge current is discharged to the GND, and an input gate of an input circuit connected to the electrostatic discharge protecting circuit is protected. In this case, the absolute value of the gate threshold voltage Vthp of the PMOS transistor is small, thus making it possible to start operation of the SCR by a low voltage trigger.
In an LSI of analog and digital mixed type in which a thin oxide element is used in general, signals with a low voltage are transmitted and/or received between a plurality of power supply system circuits of different power supply systems. In an LSI in which an analog circuit which is weak in interference of a noise signal, a low voltage differential signal circuit (LVDS) which is operable at a high speed, a dynamic type semiconductor memory (embedded type DRAM) and the like are incorporated as the power supply system circuits, a ground line separation technique which separates ground lines of the power supply system circuits from each other is effective in terms of reducing interference of a noise signal caused between the plurality of power supply system circuits or enabling selective setting of those of the power supply system circuits which are out of use to a standby state.
In a conventional LSI in which the ground line separation technique and a plurality of power supply systems of different power supply systems are employed and electrostatic discharge protecting circuits are provided, electrostatic discharge protecting circuits are provided correspondingly to the power supply system circuits and connected between power supply terminals and ground terminals of the power supply system circuits. Internal circuits are provided to the power supply system circuits, correspondingly. Internal signal transmission lines are provided each to transmit a signal from an internal circuit of a power supply system circuit to an internal circuit of another power supply system circuit.
The ground terminals of the power supply system circuits are connected to each other via a circuit for discharging a current due to ESD and a wiring. An example of the discharging circuit is comprised of a circuit comprising two diodes connected to each other in opposite directions.
When a surge current due to ESD flows through the discharging circuit and the wiring, a voltage drop occurs across the discharging circuit and the wiring, and the potential difference between the ground terminals increases. Thus, a voltage greater than a rated voltage is applied to an input gate of an internal circuit whose input node is connected to the internal signal transmitting line, and there will arise a situation that the input gate is broken down.
As a countermeasure for this problem, the size of the electrostatic discharge protecting circuit is increased, whereby an allowable value of the resistance of the ground wiring is made large. As the size of the electrostatic discharge protecting circuit is increased, however, routing a wiring other than the LSI ground wiring or its resistance are affected, and a significant restriction occurs with layout and design of external connecting terminals (pin). Such problem occurs similarly in an LSI in which a thick oxide element is used.
As described above, in a conventional LSI in which the ground line separation technique and a plurality of power supply systems of different power supply systems are employed, due to a voltage drop across the resistance caused when a surge current flows through the ground line, a potential difference between the internal signal transmitting portions between the power supply system circuits increases, and thus, the input gate of the internal circuit is broken down.